? semiconductor components industries, llc, 2007 october, 2007 - rev. 0 1 publication order number: NLAS6233/d NLAS6233 audio dpdt switch with noise suppression description the NLAS6233 is a dpdt switch featuring popless noise suppression circuitry designed to prevent pass through of undesirable transient signals known as pops. intended for audio systems within portable applications, it provides protection against audible pops that are generated when switching between two different audio sources, such as an amplifier and a codec. the NLAS6233 incorporates two double throw switches controlled by a single select line which allows the system controller to simultaneously switch between two sets of signal lines. the popless noise suppression circuitry con trols the on and off times that define the time interval when switching between the normally open (no) and normally closed (nc) terminals. this allows any pops to be dissipated within the system before the switch settles into a closed position. the NLAS6233 operates off of a single supply voltage, v cc , and is available in an ultra-thin uqfn10 package. features ? popless noise suppression circuitry ? ovt up to +4.5 v on control pin ? r on < 0.5 across bcc range, typical ? thd < 0.02 %, typical ? off isolation = -70 db, typical ? crosstalk attenuation < -70 db, typical ? ultra small, thin package: 1.4 mm x 1.8 mm uqfn10 ? this is a pb-free device typical applications ? cell phones, pdas, mp3 and other portable media players uqfn10 mu suffix case 488at see detailed ordering and shipping information in the package dimensions section on page 8 of this data sheet. ordering information marking diagram http://onsemi.com am = specific device code m = date code = pb-free package (note: microdot may be in either location) 1 am m
NLAS6233 http://onsemi.com 2 figure 1. pin connections and logic diagram (top view) nc2 gnd v cc no1 no2 com2 test com1 s nc1 10 9 8 345 7 6 1 2 timing/ noise reduction control note: pin 8 is for ate use only, not intended for end customer use. pin assignment pin function v cc supply voltage gnd ground s control input select line test ate test pin nc1, no1, nc2, no2 independent channels com1, com2 common channels s nc1, nc2 no1, no2 0 on off truth table 1 off on maximum ratings symbol pins rating value unit v cc v cc positive dc supply voltage -0.5 to +5.5 v v is nox, ncx, comx analog signal voltage -0.5 to v cc + 0.5 v v in s control input voltage -0.5 to +5.5 v i is_con nox, ncx, comx analog signal continuous current-closed switch 300 ma i is_pk nox, ncx, comx analog signal continuous current 10% duty cycle 500 ma i in s control input current 20 ma t s t s storage temperature -65 to +150 c stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability. recommended operating conditions symbol pins parameter min max unit v cc v cc positive dc supply voltage 2.7 4.5 v v is nox, ncx, comx analog signal voltage gnd v cc v v in s control input voltage (ovt protection) gnd 4.5 v t a operating temperature range -40 +85 c t r , t f input rise or fall time, sv cc = 3.0 v to 3.6 v 0 10 ns/v
NLAS6233 http://onsemi.com 3 dc electrical characteristics control input (typical: t = 25 c, v cc = 3.3 v) symbol pins parameter test conditions v cc (v) - 40 c to +85 c unit min typ max v ih s minimum high-level input voltage, select input 2.7 4.2 1.4 2.0 - - v v il s maximum low-level input voltage, select input 2.7 4.2 - - 0.7 0.8 v i in s control input leakage current v is = gnd 2.7-4.5 - 100 1000 na supply current and leakage (typical: t = 25 c, v cc = 3.3 v, v in = v cc or gnd) symbol pins parameter test conditions v cc (v) - 40 c to +85 c unit min typ max i cc v cc quiescent supply current v is = v cc or gnd; i d = 0 a 2.7 - 4.5 - <100 1000 na i nc(off) , i no(off) ncx, nox off state leakage current v com = 4.5 v v no , v nc = 1.0 v 2.7 - 4.5 - 10 1000 na i off power off leakage current v is = gnd 0 - 10 1000 na on resistance (typical: t = 25 c, v cc = 3.3 v) symbol pins parameter test conditions v cc (v) - 40 c to +85 c unit min typ max r on on-resistance v in = v il or v in = v ih v is = 0 to v cc ; i is = 100 ma 2.7 4.2 - 0.45 0.40 0.60 0.55 r flat on-resistance flatness v is = 0 to v cc ; i is = 100 ma 2.7 4.2 - 0.12 0.15 0.16 0.19 r on on-resistance match between channels v is = 0 to v cc ; i is = 100 ma 2.7 4.2 - 0.16 0.19 0.24 0.23
NLAS6233 http://onsemi.com 4 ac electrical characteristics timing/frequency (typical: t = 25 c, v cc = 3.3 v, r l = 50 , c l = 35 pf, f = 1 mhz) symbol pins parameter test conditions v cc (v) -40 c to +85 c unit min typ max t on - turn-on time (figures 2, 3, 12) 2.7-4.5 17 ns t off - turn-off time (figures 2, 3, 13) 2.7-4.5 9.0 ns t bbm - minimum break before make time (figure 14) v is = 3.0, typ @ v cc = 3.6 v 3.4-4.2 175 ms bw - -3db bandwidth v is = 0 db 2.7-4.5 36 mhz isolation (typical: t = 25 c, v cc = 3.3 v, r l = 50 , c l = 5 pf) symbol pins parameter test conditions v cc (v) -40 c to +85 c unit min typ max o irr nox off-isolation v is = 1.0 v rms , f = 100 khz 2.7-4.5 -70 db xtalk com 1 to com 2 crosstalk v is = 1.0 v rms , f = 100 khz 2.7-4.5 -98 db thd - total harmonic distortion r l = 600 , v comn = 2.0 v p-p 3.0 0.02 % capacitance (typical: t = 25 c, v cc = 3.3 v, r l = 50 , c l = 5 pf, f = 1 mhz) symbol pins parameter test conditions v cc (v) -40 c to +85 c unit min typ max c in s select input capacitance 0 2.5 pf c off nox off-capacitance v is = 3.3 v, s = 0 v 2.7-4.5 45 pf c on comx to ncx on-capacitance s = 0 v 2.7-4.5 110 pf
NLAS6233 http://onsemi.com 5 figure 2. t on / t off , v is = v cc 90% 50% 90% 50% v cc 0 v v ol v oh t on t off output input dut output v out 35 pf input 50 open v cc 0.1 f figure 3. t on / t off , v is = gnd 10% 50% 50% v cc 0 v v ol v oh t on t off output input dut output v out 35 pf input 50 open v cc 10% figure 4. off-channel isolation/on channel loss (bw)/crosstalk (on channel to off channel)/v onl channel switch control/s test socket is normalized. off isolation is measured across an off channel. on loss is the bandwidth o f an on switch. v iso , bandwidth and v onl are independent of the input signal direction. bandwidth (bw) = the frequency 3 db below v onl v ct = use v iso setup and test to all other switch analog input/outputs terminated with 50 v iso offchannelisolation 20log v out v in for v in at100khz v onl onchannelloss 20log v out v in for v in 50 50 50 generator reference transmitted dut input output at 100 khz to 50 mhz
NLAS6233 http://onsemi.com 6 figure 5. crosstalk vs. frequency @ 25 c figure 6. bandwidth vs. frequency @ v cc = 3 v frequency (mhz) magnitude (db) -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 0 0.01 0.1 1 10 100 frequency (mhz) -4 -3.5 -3 -2.5 -2 -1.5 0 magnitude (db) figure 7. total harmonic distortion @ v cc = 3 v figure 8. on-resistance vs. input voltage @ v cc = 3.0 v frequency (khz) 0.01 0.1 1 10 100 0.04 0.025 0.02 0.015 0.01 0.005 0 thd (%) v in (v) 3.0 2.5 2.0 1.5 1.0 0.5 0 0.50 0.10 r on ( ) 0.20 85 c 25 c -40 c figure 9. on-resistance vs. input voltage @ v cc = 4.3 v figure 10. on-resistance vs. input voltage @ 25 c r on ( ) v in (v) 3.5 4.0 2.5 3.0 1.5 2.0 0.5 1.0 0 3.0 v 4.3 v r on ( ) v in (v) 3.5 4.0 2.5 3.0 1.5 2.0 0.5 1.0 0 4.5 85 c 25 c -40 c -1 -0.5 0.03 0.035 0.40 4.5 0.45 0.15 0.25 0.30 0.35 0.50 0.10 0.20 0.40 0.45 0.15 0.25 0.30 0.35 0.50 0.10 0.20 0.40 0.45 0.15 0.25 0.30 0.35 0.01 0.1 1 10 100
NLAS6233 http://onsemi.com 7 figure 11. i cc vs v cc figure 12. t on vs v cc figure 13. t off vs v cc i cc (na) v cc (v) 3.5 4.0 2.5 3.0 1.5 2.0 0.5 1.0 0 150 e-9 50 e-9 -50 e-9 85 c 25 c -40 c 4.5 t on (ns) v cc (v) 4.0 3.5 3.0 2.5 2.0 1.5 25 10 5 0 85 c 25 c -40 c 5.0 t off (ns) 100 e-9 0 e+0 15 4.5 v cc (v) 85 c 25 c -40 c 20 4.0 3.5 3.0 2.5 2.0 1.5 25 10 5 0 5.0 15 4.5 20
NLAS6233 http://onsemi.com 8 popless implementation on the NLAS6233 audio sources such as amplifiers or codecs can generate undesirable, transient voltage spikes when powering up and down. those voltage spikes can be translated into current surges and ultimately lead to audible pop noises in the speaker if not diverted or suppressed. the NLAS6233 includes popless noise suppression circuitry designed to prevent such undesirable pops from propagating through to the speaker. this feature is realized through a deliberate increase in the break-before-make time, t bbm , and is useful in applications where a switch is used to alternate between two different audio sources. when the signal from the common pin is removed from one terminal, the switch waits an extended amount of time before connecting to the opposite terminal. the time interval for t bbm is a function of the supply voltage of the switch, v cc . figure 14 show s the relationship of t bbm for each v cc value within the recommended operating voltage range. figure 14. NLAS6233 t bbm vs. v cc v cc (v) t bbm (ms) 350 300 250 200 150 100 50 3.0 3.4 3.6 3.8 4.0 4.2 3.2 500 450 400 device ordering information device package shipping ? NLAS6233mutbg uqfn10 (pb-free) 3000/tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specification brochure, brd8011/d.
NLAS6233 http://onsemi.com 9 package dimensions uqfn10, 1.4x1.8, 0.4p case 488at-01 issue a *for additional information on our pb-free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. a b a1 0.05 c seating plane note 3 notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters 3. dimension b applies to plated terminal and is measured between 0.25 and 0.30 mm from terminal. 4. coplanarity applies to the exposed pad as well as the terminals. dim min max millimeters a 1.40 bsc a1 0.40 bsc 0.45 0.60 b d 0.30 0.50 e e l l1 0.00 0.05 pin 1 reference d a e b 0.10 c 2x 0.10 c 2x 0.05 c c l3 10 1 3 5 6 0.05 c 0.10 ca b 10 x e e/2 l 9 x 0.00 0.15 1.80 bsc 0.15 0.25 10x l1 detail a bottom view (optional) l3 0.40 0.60 0.127 ref a3 top view side view bottom view mounting footprint 10 x pitch 1 9 x scale 20:1 0.663 0.0261 0.200 0.0079 0.400 0.0157 0.225 0.0089 2.100 0.0827 1.700 0.0669 0.563 0.0221 mm inches on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. typical parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including typicals must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800-282-9855 toll free ?usa/canada europe, middle east and africa technical support: ?phone: 421 33 790 2910 japan customer focus center ?phone: 81-3-5773-3850 NLAS6233/d literature fulfillment : ?literature distribution center for on semiconductor ?p.o. box 5163, denver, colorado 80217 usa ? phone : 303-675-2175 or 800-344-3860 toll free usa/canada ? fax : 303-675-2176 or 800-344-3867 toll free usa/canada ? email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative
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